Welcome to my homepage!

 

AVolkova
I am currently an Inria postdoctoral researcher in the Arithmetic and Computing (AriC) team at LIP, ENS de Lyon.

My research currently concerns three main axes:

  • Efficient rational approximations implemented on modern floating-point processors (collaboration with Jean-Michel Muller, CNRS)
  • Guaranteed approximation of general numerical programs (collaboration with Eva Darulova, MPI)
  • Design of optimal multiplierless digital filters on FPGA (collaboration with Martin Kumm, Kassel Unviersity and Silviu Filip, Inria)

I did my PhD in Computer Science at the LIP6 laboratory, University of Pierre and Marie Curie (now Sorbonne University). I was a member of the Performance and Quality of Numerical Algorithms (PEQUAN) team and took part in the ANR project “Metalibm“. My supervisors were  Thibault Hilaire and Christoph Lauter. In September 2017 I defended my thesis entitled “Towards reliable implementation of digital filters” (slides and manuscript).


Towards reliable implementation of digital filters.

How digital signal processing and computer arithmetic meet.

Signal processing and control algorithms are prevalent in a large range of systems: from aerospace control and telecommunications to military and industrial. One of the basic bricks of these algorithms is Digital Filters. Growing number of applications and demand for increasingly sophisticated algorithms go hand-in-hand with the rapid development of device technology for implementing Digital Filters.
One of the most important considerations in the evaluation of performance of  a Digital Filter is its behavior under finite-precision constraints. Usually,  for implementations in embedded systems we seek for the maximum possible degradation of the accuracy, in order to speed up the computations, win maximum place on the circuit and/or decrease power consumption. Achieving this trade-off while providing correct output is complicated and existing approaches require some level of fault tolerance. While occasional failure of telecommunication system usually does not represent any issue, in automotive and aerospace applications it may be unacceptable. In addition, emerging interest in automated control systems that interact with human beings (for example, automated driving systems) rises the safety standards and makes no system fault admissible.

In my thesis, I aimed at providing tools for optimal and reliable implementation of linear filters. More precisely, I have taken part in development of an automatic filter code generator. During my thesis I have participated in the development of all stages of the generator, by improvement of the algorithmic foundations of the digital filter implementation process, and by software implementation of those algorithms. In particular, I provided algorithms for rigorous evaluation of the errors due to implementation of digital filters on Fixed-Point processors. I achieved this by combining techniques from computer arithmetic domain, such as rigorous floating-point error analysis, interval arithmetic and multiple precision implementations.
My algorithms allow for optimal determination of the parameters for hardware or software implementation of any linear digital filter. This work permitted me to achieve double competence in both signal processing and computer arithmetic domains.

Keywords: computer arithmetic, floating-point error analysis, digital signal processing, linear filters, code generation, multiple precision arithmetic, interval arithmetic, worst-case peak gain, reliable computations

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